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Hermosa.png

System Architecture

High-speed embedded RAM; 72 MB data in 32 banks. 2MB program RAM

16 high-speed serial ports at 10Gbps for a 320Gbps Bi-directional rate

Processor Core

Built-in instructions for communications, synchronization, aiding scatter/gather capabilities

256 processor cores (tDSPs)

64 programmable DMA engines

Scalability

Designed to be built into powerful processing arrays allowing up to 512,000 chips addressability.

251 longwords (longword = 32 bits) address space

256GFlops/s Floating point ops/sec

3,702 GB/s memory bandwith

Integrated L1 Router

To cores: 32 ports, 1Tb/s bandwidth

To other processors: 16 bidirectional 10Gbps ports = 320Gbps (multi- dimensional routing)

Power Consumption

34W

len ci si to bude moct smrtelnik dovolit aj kupit